ECE 524 Synthesis & Verification of Digital Circuits
Binary decision diagrams, finite state machines and finite automata. Design automation concepts in logic level synthesis, optimization and verification fo combinational as well as sequential logic. Technology mapping.
Credit Hours: 3 Lecture
Prerequisites: ECE 423,
ECE 425, or consent of instructor
Textbooks:
“Synthesis
and Optimization of Digital Circuits, 1st Edition”, Giovanni De
Micheli, McGraw Hill, 1994, ISBN: 0070163332.
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