ECE 525 Physical Design Automation
Advances in the automation of VLSI layouts with emphasis on recent development in deep submicron, FPGA and MCM technologies. Floorplanning, placement, routing objectives in high performance designs using deep submicron technology. Timing analysis in the presence of crosstalk. FPGA architectures and design with dynamically reconfigurable FPGAs. Physical design automation for MCMs.
Credit Hours: 3 Lecture
Prerequisites: ECE 423,
ECE 425, or consent of instructor
Course Coordinator:
Spyros Tragoudas
Textbooks:
“Algorithms for
VLSI Physical Design Automation, 3rd Edition”, N. Sherwani,
Springer, 1999, ISBN: 0-7923-8393-1.
References:
“Application Specific Integrated Circuits”, M.J.S. Smith, Addison-Wesley, 1997.
Papers from journals and conference proceedings.
Goals:
To provide graduate students with the ability to design or improve automation tools for the layout of digital circuits and systems.
To introduce dynamically reconfigurable FPGA, and MCM technologies.
To design tools for timing analysis for submicron designs.
Projects:
Design portions of a physical design automation tool.
Timing analysis tool for digital circuits.
Computer Tools: Cadence, CUDD, GRASP
Last Review: Spring Semester 2004
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