Department of Electrical and Computer Engineering
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From the Chair |
ECE ArchivesA VLIW Architecture and Compiler Framework for Time PredictabilityDr. Wei Zhang has received a two year, $120,000, research grant from the National Science Foundation (NSF), entitled “CSR---EHS: A VLIW Architecture and Compiler Framework for Time Predictability. While conventional microprocessors focus on improving average-case performance, the objective of this project is to design a time-predictable processor that can be used in hard real-time and safety-critical systems such as automotive and aircraft control systems, where time predictability of computing is vital for the correctness and reliability of operations. This project will also study a number of compiler techniques to support the time-predictable VLIW architecture without compromising its high performance and low hardware complexity.
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