Publications:

• H. Wang and S. B. K. Vrudhula, "Behavioral Synthesis of Field Programmable Analog Array Circuits", ACM Transcations on Design Automation of Electric Systems, October, 2002.
• H. Wang, S. B. K. Vrudhula, and O. A. Palusinski, "Performance Driven Placement and Routing for Field Programmable Analog Arrays", Proceeding of the 8th International Conference on Mixed Design of Integrated Circuits and Systems, 2001, Poland
• H. Wang, S. B. K. Vrudhula, and O. A. Palusinski, "Behavioral Level Analog Synthesis for Field Programmable Analog Arrays", Proceeding of the 7th International Conference on Mixed Design of Integrated Circuits and Systems, 2000, POland
• H. Wang and P. C. Liu, "Double-edge-triggered address pointer for low power high speed FIFO memories", IEE Electronics Letters, Vol. 33, No. 5, February, 1997.
• H. Wang, P. C. Liu and K. T. Lau, "Low power dual-port CMOS SRAM macro design", IEE Electronics Letters, Vol. 32, No. 15, July, 1996.
• H. Wang and P. C. Liu, "A low power current sensing scheme for CMOS SRAM", The Records of the IEEE International Workshop on Memory Technology, Design and Testing, 1996, Singapore.
• P. C. Liu, H. Wang, and O. K. Tan, "A word-line automatic switching-off scheme for low power SRAM", The Proceeding of the Sixth international Symposium on IC Technology, Systems & Applications, 1995, Singapore.
• P. C. Liu, H. Wang, H. M. Tan and H. Jiang, "Capacitive loadings of VLSI metal interconnect", The EEE Journal of Nanyang Technological University, 1996, Singapore.
• P. C. Liu, B. Lee, E. A. Lian, G. C. Han and H. Wang, "The related effects on increased PN junction area on ESD protection capability", The Proceeding of the 5th International Symposium on the Physical & Failure Analysis of Integrated Circuits, 1995, Singapore.

Technical Report

• Haibo Wang and Sarma B. K. Vrudhula, "A Low Voltage, Low Power Ring Pointer for FIFO Memory Design" (PS , PDF )